Methodology for Electrical Characterization of MOS Devices with Alternative Gate Dielectrics

Aggressive scaling of Complementary Metal Oxide Semiconductor (CMOS) devices is driving SiO2 based gate dielectrics to its physical limits. Currently several alternative dielectric materials are being studied extensively as replacement for SiO2. This work mainly discusses charge trapping and the dielectric reliability of SiO2 / Al2O3 and SiO2 / HfO2 dual layer gate dielectrics. Due to the presence of transient charging / discharging effects measurement techniques down to the µs time range are being introduced.