Building blocks for the Software-Defined Vehicle

Achieving full update capability for all vehicle functions is a key driver of the software-defined vehicle (SDV). This software-centric approach significantly impacts software allocation, function implementation, and overall electronic architecture. The most notable changes include the centralization of functions within a main control unit, a shift from domain-based to zonal architecture, and the introduction of microcontroller (MCU)-free and therefore software-free actuators. However, transitioning to vehicle architectures without local MCUs presents several challenges. This paper explores key aspects, challenges, and solutions for the practical implementation of the SDV paradigm, with a particular focus on lighting actuators. In classic architectures, the local MCU performs several critical tasks, including monitoring communication with other network participants, controlling driver modules, and handling diagnostics. In the SDV, these functions must be re-evaluated and reassigned. A key consideration is the implementation of hardware abstraction. Traditionally, the local MCU serves as the bridge between the in-vehicle network, which operates on standardized protocols, and various driver devices that rely on proprietary interfaces and protocols. If this bridge is simply removed, driver-specific control must be managed by the host. On the lamp side, the execution of safety-relevant functions must be ensured in case of failure. Additionally, robust security measures are required to protect communication and prevent unauthorized hardware access. Implementing all these aspects directly within driver devices appears impractical. A more viable approach is the combination of SDV-optimized endpoints, driver devices, and application-specific companion chips. This approach enables effective hardware abstraction, ensures multi-vendor compatibility, and supports fail-safe concepts for microcontroller-free actuators. Furthermore, it addresses security challenges while maintaining the low-latency performance required for time-critical applications.