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High-Performance Data Compression-Based Design for Dynamic IoT Security Systems

Aboelmaged, Maha ; Shisha, Ali ; Ghany, Mohamed A. Abd El (2024)
High-Performance Data Compression-Based Design for Dynamic IoT Security Systems.
In: Electronics, 2021, 10 (16)
doi: 10.26083/tuprints-00019626
Article, Secondary publication, Publisher's Version

Copyright Information: CC BY 4.0 International - Creative Commons, Attribution.

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Item Type: Article
Type of entry: Secondary publication
Title: High-Performance Data Compression-Based Design for Dynamic IoT Security Systems
Language: English
Date: 12 January 2024
Place of Publication: Darmstadt
Year of primary publication: 2021
Place of primary publication: Basel
Publisher: MDPI
Journal or Publication Title: Electronics
Volume of the journal: 10
Issue Number: 16
Collation: 20 Seiten
DOI: 10.26083/tuprints-00019626
Corresponding Links:
Origin: Secondary publication DeepGreen

IoT technology is evolving at a quick pace and is becoming an important part of everyday life. Consequently, IoT systems hold large amounts of data related to the user of the system that is vulnerable to security breaches. Thus, data collected by IoT systems need to be secured efficiently without affecting the IoT systems’ performance and without compromising security as well. In this paper, a high-performance dynamic security system is introduced. The system makes use of the ZedBoard’s dynamic partial reconfiguration capability to shift between three distinct cipher algorithms: AEGIS, ASCON, and DEOXYS-II. The switching between the three algorithms is performed using two different techniques: the algorithm hopping technique or the power adaptive technique. The choice of which technique to be used is dependent on whether the system needs to be focused on performance or power saving. The ciphers used are the CAESAR competition finalists that achieved the greatest results in each of the three competition categories, where each cipher algorithm has its own set of significant characteristics. The proposed design seeks to reduce the FPGA reconfiguration time by the application of LZ4 (Lempel-Ziv4) compression and decompression techniques on the ciphers’ bitstream files. The reconfiguration time decreased by a minimum of 38% in comparison to the state-of-the-art design, while the resource utilization increased by approximately 2%.

Uncontrolled Keywords: IoT, ZedBoard, DPR, LZ4, lightweight cryptography
Status: Publisher's Version
URN: urn:nbn:de:tuda-tuprints-196268
Additional Information:

This article belongs to the Section Computer Science & Engineering

Classification DDC: 600 Technology, medicine, applied sciences > 621.3 Electrical engineering, electronics
Divisions: 18 Department of Electrical Engineering and Information Technology > Institute of Computer Engineering > Integrated Electronic Systems (IES)
Date Deposited: 12 Jan 2024 14:09
Last Modified: 06 Feb 2024 07:51
SWORD Depositor: Deep Green
URI: https://tuprints.ulb.tu-darmstadt.de/id/eprint/19626
PPN: 51524810X
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